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We worry a lot about Moore’s Law running out of gas right about now. Now comes former AMD CEO Hector Ruiz with this piece on Harvard Business Review’s blog: “There, however, is a possible “off-ramp” to Moore’s Law that offers [...]
LOS ANGELES–So often, we get ahead of ourselves a consuming public, especially when it comes to technology innovation. Take power generation and smart-grid management. We know that electronics that drive enormous efficiency gains on the grid. After all, our smart [...]
By Malcolm Fuller, contributing writer SANTA CLARA, Calif. – You wake up in your chilly San Francisco apartment (or any chilly place for that matter), and your first instinct is not to crank up the thermostat several notches (too expensive!). [...]
By Brian Fuller We’ve written all lot about the quickening pace of innovation in automotive electronics design. And you’ll recall the centerpiece of the first part of the Drive for Innovation was an all-electric Chevy Volt, which took us around [...]
Leveraging software for faster system development
1 June 2012
SAN JOSE, Calif. — The tyrannical mistress that is the march of electronics innovation has pushed engineering teams to build more products in parallel–crafting software code to run on hardware that's being developed in parallel. It's an extraordinary feat that's not without perils.
EDA companies (which will gather next week for the Design Automation Conference) have worked for more than a decade to minimize those perils. In 2011, Cadence Design Systems unveiled its Virtual Systems Platform (VSP) in conjunction with Rapid Prototyping Platform (RPP) (a tool for FPGAs).
VSP, in short, automates the process of creating a virtual prototype, debugging software, and deploying the virtual prototype to the software team. This year, VSP was honored as an Ultimate Product in the EE Times/EDN ACE Awards.
Michael McNamara, vice president and general manager of system level design at Cadence, who accepted the award, talked with us during our road trip about the rationale behind developing VSP:
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